Santiago de Pablo
Dept. Electronics Technology
University of Valladolid
Email: sanpab@eii.uva.es
Esc. Ingenierías Industriales
P. Prado de la Magdalena, 3-5
47011 Valladolid
Spain / España
Phone: (+34) 983 42 33 45
June 2nd, 2015
Alberto Apellaniz Cosgaya has defended his Thesis (Proyecto Fin de Carrera) entitled "Programación en C/C++ de un sistema de licencias basado en RSA y SHA-1 para un procesador de 8 bits embebido en FPGA".
May 27th, 2015
Alejandro Martínez de Ilarduya Alcalde has defended his Thesis (Proyecto Fin de Carrera) entitled "Desarrollo de una librería de componentes no lineales para un simulador Hardware in the Loop". Previously he was at eZono for a 6-month scholarship.
September 1st, 2014
An EII student has joined eZono AG, Jena, Germany for six month. He got an Erasmus Prácticas grant.
July 16th, 2014
Alberto Matía Izquierdo has defended his Thesis (Proyecto Fin de Carrera) entitled "Diseño de un procesador DSP en coma flotante sobre un dispositivo reconfigurable FPGA programable en C para aplicaciones HIL y RCP en tiempo real".
March 15th, 2013
Víctor García Jiménez has defended his Thesis (Proyecto Fin de Carrera) entitled "Creación de librerías de coma flotante para un compilador C/C++ de un microprocesador de propósito general". Previously he was at eZono for a 6-month scholarship.
June 1st, 2012
Two EII students have joined eZono AG, Jena, Germany for six month. They got an Erasmus Prácticas grant.
Alberto Apellaniz Cosgaya has defended his Thesis (Proyecto Fin de Carrera) entitled "Programación en C/C++ de un sistema de licencias basado en RSA y SHA-1 para un procesador de 8 bits embebido en FPGA".
May 27th, 2015
Alejandro Martínez de Ilarduya Alcalde has defended his Thesis (Proyecto Fin de Carrera) entitled "Desarrollo de una librería de componentes no lineales para un simulador Hardware in the Loop". Previously he was at eZono for a 6-month scholarship.
September 1st, 2014
An EII student has joined eZono AG, Jena, Germany for six month. He got an Erasmus Prácticas grant.
July 16th, 2014
Alberto Matía Izquierdo has defended his Thesis (Proyecto Fin de Carrera) entitled "Diseño de un procesador DSP en coma flotante sobre un dispositivo reconfigurable FPGA programable en C para aplicaciones HIL y RCP en tiempo real".
March 15th, 2013
Víctor García Jiménez has defended his Thesis (Proyecto Fin de Carrera) entitled "Creación de librerías de coma flotante para un compilador C/C++ de un microprocesador de propósito general". Previously he was at eZono for a 6-month scholarship.
June 1st, 2012
Two EII students have joined eZono AG, Jena, Germany for six month. They got an Erasmus Prácticas grant.
Ph.D. Thesis |
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Nowadays my research is focused, whithin the DEEPER research group, on the application of Reconfigurable Devices (mainly FPGAs) to control Power Electronics Converters (DC/AC and AC/AC, mainly). At the workgroup we have developed the following Ph.D. Thesis:
- Study and evaluation of distributed power electronic converters in photovoltaic generation applications authored by Dr. Zaid A. Aljawary and mentored by Dr. S. de Pablo and Dr. L.C. Herrero.
- Study of new vector-control algorithms for 3-phase inverters used in renewable agents connected to the low-voltage utility grid with disturbances authored by Dr. Néstor F. Guerrero-Rodríguez and mentored by Dr. Alexis B. Rey-Boué.
- Estudio y Simulación de Convertidores CA/CA Directos 3x3 en Matriz de Conversión controlados mediante Sliding Fuente de Corriente authored by Dr. Luis Carlos Herrero de Lucas and mentored by Dr. S. de Pablo and Dr. J.M. Ruiz.
- Control de aerogeneradores de paso fijo para extraer la máxima potencia eólica authored by Dr. Fernando Martínez Rodrigo and mentored by Dr. J.M. Ruiz and Dr. J.A. Domínguez.
- Estudio de la Aplicación de los Dispositivos Programables tipo FPGA al Diseño de Circuitos Digitales de Comunicación authored by Dr. Luis José Vaquero Garrote and mentored by Dr. S. de Pablo.
- Control Digital Vectorial con Sliding en Fuente de Corriente para Convertidores CC/CA Trifásicos conectados a Red authored by Dr. Alexis B. Rey Boué and mentored by Dr. S. de Pablo and Dr. J.M. Ruiz.
- Estudio del Test de Tarjetas de Circuito Impreso con Circuitos Digitales VLSI y Memorias RAM authored by Dr. Santiago Cáceres Gómez and mentored by Dr. J.M. Ruiz.
- Arquitecturas y Algoritmos para el Tratamiento y la Segmentación de Imágenes en Tiempo Real authored by Dr. Santiago de Pablo Gómez and mentored by Dr. S. Lorenzo.
Research Projects |
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- CICYT - ENE2007-67417/ALT (€68,244, 2007.10~2010.09): "Development of new Power Converters and Control Circuits for Grid connected Wind Generators" developed by S. de Pablo, F. Martínez, L.C. Herrero, S. Cáceres and J.A. Cebrián.
- EZONO - 061/063951 & 061/073952 (€48,000, 2006.01~2008.08): "Implementation of a signal processing platform on a FPGA using a PCI Express bus for input/output" developed by S. de Pablo, S. Cáceres, J.A. Cebrián, L.C. Herrero and A.B. Rey. Four students have joined this Project, two of them are now working at eZono AG, Jena, Germany.
- ISEND - 061/073951 (€52,200, 2007.01~2008.06): "Test of printed circuit boards for nondestructive testing equipment" developed by S. Cáceres y S. de Pablo, J.A. Cebrián, L.C. Herrero and F. Martínez.
- JCYL - VA004B06 (€9,900, 2006.01~2007.12): "Development of flexible control structures for DC/AC power converters using FPGA devices" developed by S. de Pablo, S. Cáceres, L.C. Herrero, F. Martínez, J.A. Cebrián and A.B. Rey.
- JCYL - VA021B06 (€9,900, 2006.01~2007.12): "Study and implementation on a 5 KW prototype of AC/AC converters' commutation techniques" developed by L.C. Herrero, F. Martínez, S. de Pablo and A.B. Rey.
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| eZono AG Jena, Germany |
ISEND SA Valladolid, Spain |
FPGAworld Conference Stockholm, Sweden Copenhagen, Denmark |